1. Field of the Invention
The invention relates to the field of multithreaded central processing units (CPUs) and more particularly to using hard real time threads for software implementations of high speed input and output protocols.
2. Description of Background Art
Many functions traditionally performed by hardware can be performed instead by software. A software implementation of a hardware function is called a virtual peripheral. Virtual peripherals are advantageous because they provide flexibility and breadth of functionality for a processor without requiring additional hardware components. One type of virtual peripheral is software implementation of input and output (I/O) protocols. In addition to providing the advantage of flexibility, software implementation of I/O protocols saves significant die space that would otherwise be used by a hardware implementation of the I/O protocol.
Software implementation of low speed I/O protocols has been performed in the past. Such low speed protocols have been limited to performance of less than 200 kbps. However, it is desirable to also allow software implementation of high speed I/O protocols, such as a peripheral component interconnect (PCI) I/O protocol at approximately 100 Mbps, or a Utopia I/O protocol at approximately 8 Mbps. Such software implementations of high speed I/O protocols require processors with both high speed and deterministic performance.
In the past, embedded processors have been used to implement low speed I/O protocols. An embedded processor is a processor that is used for specific functions. However, conventional embedded processors do not have the speed required to implement high speed I/O protocols.
Other conventional non-embedded processors, such as MIPS and ARM processors, are faster than conventional embedded processors. However, high speed I/O protocols demand timing within certain parameters, and limited jitter. Conventional non-embedded processors are unable to provide deterministic timing performance. Thus, conventional non-embedded processors are not able to support proper operation of virtual peripherals implementing high speed I/O protocols.
What is needed is a system and method that allows proper operation of a virtual peripheral for high speed I/O, such as PCI I/O and Utopia I/O. Such a system and method: (1) provides deterministic timing performance; and (2) allows I/O speeds of more than 200 kbps.